Secure-IC

France

Secure-IC recently achieved ten years in business of growth and progression, during which time, the company has expanded globally. With presence in 20 countries across 5 continents, Secure-IC has established a thought leadership position in the security world. Secure-IC sets itself apart by accompanying customers along the IC design process by providing best in class protection technologies, integrated secure elements and security platforms to reach the best available certification required for different markets. Combining a full set of analysis platforms with best of breed set of security technologies & backed by almost 40 families of international patents, Secure-IC is considered a leader in cyberspace security embedded systems. Secure-IC protects companies against attacks and guarantees at each stage of the design process that the absolute optimal security level is reached. The best of breed technologies that are provided stem from the company’s commitment to the research community in order to foresee future major threats, tackle problems with innovative solutions & empower the intricate work of the industry standardization bodies. The company provides Silicon proven technology, pioneering in AI for embedded security, post quantum & hybrid, and state-of-the-art synthesis of attacks/ countermeasures. The embedded security system lines can be better recognized as SecuryzrTM,Laboryzr,TM和ExpertyzrTMwith the latter offering analysis tools and guaranteeing certification readiness and security assurance.

Services

Securyzr

Secure-IC is able to supply embedded硬件安全模块that can act as trust anchors that protect the security setup of a company. A hardware security module is a IP block which can be embedded into every device to answer security functionalities such as root-of-trust and key management.

Secure-ICSecuryzrprovides the core security services required to build a security architecture for a wide variety of devices : mobile, connected object, payment device, smart card, ECU, Set-Top-Box, and HSM.

Key features

  • Customizable API
  • Proven Security & Certification ready (market specific and security certified)
  • Full digital solution

个性化的市场解决方案

Security functions

  • End-to-end, best of breed solutions
  • Root-of-trust: Secure Boot and Secure Secret Storage (unique ID, secret key)
  • Security Monitoring: Secure Debug, Lifecycle Management
  • Strong tamper resistance: fault injection and perturbation attacks resilience
  • Data protection ensured

Laboryzr

LABORYZR allows a security evaluation at both layers of an embedded system: the IC and the Software layers respectively. The VIRTUALYZR is in charge of the pre-silicon stage which targets the design source itself. The ANALYZR allows a post-silicon evaluation based on a real chip or device. LABORYZR does more; it also provides the CATALYZR which is dedicated to the evaluation of any software implementation.

LABORYZR includes 3 tools:

– VIRTUALYZR tool is the only one tool which allows to evaluate side-channel security during this pre-silicon design stage, from the first source code of IP (Intellectual Property) toward SoC Layout (GDS2) just before going to foundry.

– ANALYZR tool does physical security evaluation on real physical chip/board. It includes all material platforms to perform SCA measurements and FIA injection, then analysis.

– CATALYZR tool offers support to the LABORYZR solution with software evaluation reporting options.

Analyzr (Post silicon evaluation)

Analyzr is the most advanced post-silicon security evaluation platform on the market. The target to evaluate can be any embedded system, ranging from testing chips as FPGA, ASIC and Micro-controllers to end-user devices such as IoTs, smartphones, smart cards and automotive eletronic circuits.– VIRTUALYZR tool is the only one tool which allows to evaluate side-channel security during this pre-silicon design stage, from the first source Our scientists have authored some of the most advanced and highly regarded side-channel analysis and protection methodologies.

高级模块

  • Preprocessing
  • 6D-Cartography
  • NICV Analysis
  • 故障开发(DFA)
  • Report Generation
  • ISO-17825标准

Key Features

  • State-of-the art attacks
  • Single integrated tool for Side-Channel Analysis and Fault Injection Attacks
  • 经典与先进技术
  • Analyze standard or self –authored algorithms
  • 分析泄漏在位级别,并准确衡量安全级别的独特能力
  • Real-time acquisition, analysis and processing
  • Intuitive graphical interface
  • Standard packages for beginner or expert users
  • Customizable packages
  • 一键、分析报告automatically generated
  • FIPs-140 and ISO-17825 ready

Virtualyzr (Pre silicon evaluation)

VIRTUALYZR是致力于硅前安全评价的电子设计自动化(EDA)软件工具。该工具是很容易的设计理念流程中集成,并允许安全检查点,在所有的设计层面,即RTL,后合成,布局和布线和布局。此外,分析是终端到终端:从设计源头,IP SoC或到全面的安全报告生成。安全漏洞从任何加密,非加密的或功能性的(总线,存储器)实施萃取。

Two types of analysis are possible :

  • Black box-based analysisassumes that the secret is unknown and tries to recover the secret information. This allows measuring the extent of an attacker: how much time he needs to break the system. The Virtualyzr provides the last and powerful analyses existing for SCA and FIA.

  • White box-based analysis假设秘密是已知的,尝试把重点放在如何秘密是这样的表现。在此背景下,智能-SIC Virtualyzr提供了基于从最近的物理分析的文献来源的先进的统计计算强大的指标。

Catalyzr

TheCATALYZR提供独特的功能来评估和修正软件的源代码:

  • Quickly assess the code against the most efficient attacks on software code
  1. Side-Channel Attacks, Micro-architectural
  2. Best attacker model considered (no noise, reproducible, perfect synchronization)
  3. Focused only on the relevant functions
  • Evaluate the implementation of countermeasures
  • Have a direct feedback on the vulnerabilities at the code level
  • Integrate it in automated testing framework
  • 定时和幅度,微体系结构攻击:对于所有的网络物理攻击的工具之一

The tool allows going from a Source Code up to:

  • theLeakage Assessment Reportwith the detail of the detected leakages and their criticality
  • the泄漏调查Report用的代码,以正确的模块和线

TheLeakage Assessmentis done with the state-of-the-art attacks on software implementations. It provides metrics to detect and quantify the leakages and try to exploit it from a hacker standpoint. This is done thanks to a library of advanced processing executed in an automatic and generic workflow.

With the泄漏调查, Secure-IC tool brings a huge added value to designers. It helps interpreting the results and understanding what the origin of the leakage is. It provides a full identification of vulnerabilities for an early correction.

Embedded Security Evaluation as a Service

Before the design, during the design, and after the design, Secure-IC supplies Evaluation as a service for governments, design houses, HW/SW applications developers and end-user technology manafacturers.

The end goal is to help companies be ready and succeed at any level of standard certification.

Within the Evaluation as a service solution, you can;

  • Check compliance of target evaluation to standard certification levels
  • Test the target evaluation against advanced attacks
  • Review code design and structure
  • Review security design & integration level
  • 选择算法和规范水平
  • Select appropriate countermeasure
  • Pre-silicon evaluation analysis
  • 软件分析
  • White box/ Black box evaluation

IP Cores

可调密码

Cryptography technologies with a Tri-Dimensional trade-off of speed vs area vs security to cover customers’ needs, from Symmetric Cryptography to Asymmetric Cryptography and Hash functions.

Key Features

  • Tunability for consumer requirements
  • Security (different levels, SCA, FIA)
  • 模式
  • Area
  • Power consumption
  • Throughput
  • Security evaluation
  • Before delivery, internal security evaluation
  • Secure-IC’s Virtualyzr tool: Pre-Silicon Security Evaluation tool
  • Check that it is impossible to find all or part of the secret key
  • Above state-of-the-art embedded counter-measures

True Random Number Generator

随机数生成是在安全的一个基石。

真随机数发生器(TRNG)弹性的谐波注入的统计独立的套位代和确定性随机位发生器(DRBG)高比特率requirements.These随机生成符合常用的统计测试套件。

Secure-IC offers TRNG compliant with SP 800-90C.

  • TRNG
  • 2 types of entropy source
  • Based on metastability
  • Based on ring oscillator
  • Full digital entropy source
  • Fast: Raw output = 1-random bit per 1 clock cycle
  • Compliant with:
  • NIST (SP 800-90B)
  • AIS-31(可调谐从PTG.1高达PTG.3班)
  • Embedded health tests for failure / attack detection
  • Embedded strong post-processing for further attack mitigation
  • PRNG: CTR-DRBG
  • Designed with AES
  • Compliant with:
  • NIST (SP 800-90A)
  • CAVP验证

Key Features

  • 全数字:
  • Lower area
  • 易于实施
  • Easy transferable to any Design Kit
  • High security and safety
  • Resilient to coupling with internal periodic signal (metastability only)
  • 抵御外部谐波注入(亚稳态只)
  • Robust against process, temperature and voltage variations
  • Post-silicon fine tuning to ensure high-level functional safety

Physically Unclonable Function

Tamperproof secret generationwith高熵and可靠性

  • Free-RAM PUF
  • 与标准单元设计library
  • Easy transferable to any Design Kit
  • No helper data (depending of the targeted可靠性)
  • 老化实验实现
  • PUF vs OTP:
  • Secret is extracted from silicium vs Secret is written in silicium
  • 存储在OTP秘密可以逆转
  • OTP needs redundancy

Key Features

  • Uniqueness
  • Each device has its own signature
  • 稳健
  • 的PUF响应对噪声不敏感
  • Randomness
  • Good bit entropy
  • Robustness against attacks
  • Physical cloning (always true for a PUF)
  • Mathematical cloning (by modeling)
  • Flexible and Customizable
  • 回答各种折衷
  • 安全-IC PUF

Proven performances on all criteria :Uniqueness, Steadiness, Randomness

Digital Sensor

Universal fully-integrated fault attack sensor

  • Monitors for abnormal operating conditions
  • Small digital circuits monitoring behavior, conditions
  • Raises an alarm when situation becomes critical
  • System engineer decides action to perform w/alarm
  • Sensitive to the following
  • 温度
  • 电压
  • Clock frequency
  • Laser exposure, EM exposure
  • “Global vs. localized” threats
  • Global: Temperature, voltage, clock frequency (single-sensor)
  • 当地:EM或表面能级激光器攻击(多传感器)
  • IP是完全数字化,这使得它...
  • Difficult to locate because it is melted in the circuit/logic/standard cells
  • Easier to port to a new technology
  • “真正的时间”硬件报警(可预测的延迟)

Key Features

  • 多类型的攻击的独特的传感器
  • Fully Digital
  • No calibration after design

主动屏蔽

Active shielding and detection against invasive attacks

  • Active shield against circuit edition
  • Modification of the circuit to cut lines (verification, locks, etc.)
  • Done when there is no power, with a FIB
  • Active shield protection
  • FIB back-side circuit edition has been reported recently, but is complex and limited
  • So the attacker must break into the chip front-side
  • With Secure-IC Active Shield structure, it is difficult to
  • Remove the shield
  • Edit the circuit (in the low levels)
  • Redraw the shield

Key Features

  • Randomcryptographically-generated patterns to detectintegrity violations
  • Fully digital
  • Low area
  • Easy transferable to any Design Kit
  • No calibration after design

Scrambled Bus

Probingand tampering resilient interconnect

  • Protecting bus against malevolent probing/tampering
  • Protect against High-order attacks
  • Configurable security parameters
  • 许多职业bes
  • Number of faults
  • Transparent for the bus masters and slaves

Key Features

  • Cryptographicallysecure掩蔽
  • Tunability for consumer requirements
  • Security
  • Latency
  • Area
  • Frequency
  • Transparent for bus masters and slaves
  • Adaptable to various bus protocols

内存加密中

Memory protection against reverse engineering and tampering

  • Protecting raw memory content from malevolent access
  • Memory protection from the beginning it is written
  • Available with zero latency or high frequency
  • Light implementation
  • Fault injection detection available as an option

Key Features

  • Tunability for consumer requirements
  • Security
  • Latency
  • Area
  • Frequency
  • Word size
  • CryptographicallysecureCipheringAlgorithm
  • 故障注入检测

Secure Clock

Side-channels and fault injection anti-synchronization tool

  • Data from attacks are pieced together through precise timing
  • Secure Clock introduces jitter to complicate things for attacker
  • 通过引入随机频率随时间变化
  • Desynchronizes the activity of the circuit

Secure Boot

信任的高度安全的根

  • Security Objectives
  • Ensure the executed code has not been tampered
  • Ensure the executed code comes from a trusted party
  • Ensure the firmware’s confidentiality
  • Ensure updates security
  • Addressed Threats
  • Firmware tampering
  • Invasive probing
  • 侧信道分析
  • Fault injection analysis
  • 侵入硬件修改(FIB)
  • Root of trust establishment is required
  • Initial trust in the hardware platform
  • Initial trust in the executed software

Key Features

  • 可调性消费需求:
  • Security
  • Various options: public/private key authentication – SCA – FIA – PUF
  • Area
  • 性能
  • Ensure Secure Firmware Update
  • Security evaluation
  • Before delivery, internal security evaluation
  • Secure-IC’s Virtualyzr tool: Pre-Silicon Security Evaluation tool
  • Check that it is impossible to find all or part of the secret key

Smart Monitor – AI for Cybersecurity

嵌入式网络安全powered byAI

.

Create collective intelligence between IPs and other whistleblowers

  • Sources of information are diverse, abundant
  • Signals could come from on-chip analog sensors, digital sensors, software reports…
  • from opportunistic media (weak signals) = Indice of Compromission (IoC)

凭借多样性和互补性

  • Sensitive to physical vs logical malfunctions
  • Able to detect permanent problems vs transient issues
  • 多次实例

Key Features

增益保证在威胁检测

  • 附加信号被聚合为安全事件检测:多峰分析
  • Learning phase to “lock down the perimeter” of attack
  • Confidence & Robustness – Reduce false alarms and false positive event

The right decision at the right time in full knowledge

  • 解剖(自然、暂时性、localit的攻击y, intensity, attack phase…)
  • 取得优势攻击(攻击诊断):反转的优势
  • Built an on-chip security Headquarter to react properly – Security strategy

Business Intelligence

  • Know your device’s every-day life
  • Attack typology and statistics for ≠ device categories, geographic areas, technology nodes

网络护航单位

Hardware-enabled Cyber-security保护embedded systems, computers and IoT devices

填写SW网络安全和硬件嵌入式安全之间的安全漏洞

High security for nearly zero impact on performances

理想的安全引导和安全临界和密码保护应用

Forensics reporting, threat analysis → reverse the advantage

Differentiator: High symbolic impact on the market

Think ahead: Ahead of DARPA’s SSITH program

Key Features

  • No processor modification
  • Agnostic for the program
  • Real-time detection – no latency as for SW solutions
  • Resilient to cyber-attacks because inaccesible to hackers and to advanced FIA such as EMFI